Reduction of off-current in self-aligned double-gate TFT with mask-free symmetric LDD

被引：6
|
作者：
Zhang, SD [1 ]
Han, RQ
Sin, JKO
Chan, M
机构：
[1] Peking Univ, Inst Microelect, Beijing 100871, Peoples R China
[2] Hong Kong Univ Sci & Technol, Dept Elect & Elect Engn, Hong Kong, Peoples R China
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2002年 / 49卷 / 08期
关键词：
double-gate; lightly doped drain (LDD); self-aligned; thin-film transistor (TFT);
D O I：
10.1109/TED.2002.801232
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this brief, the lateral electric field distribution in the channel of a double-gate TFT is studied and compared with that of a conventional single-gate TFT. The double-gate TFT is predicted to suffer from a more severe anomalous off-current than the single-gate TFT. A smart double-gate TFT technology is proposed to decrease the off-current. The unique feature of the technology is the lithography independent formation of the self-aligned double-gate and the symmetric lightly doped drain (LDD) structures. With the LDD applied, the anomalous off-current of the fabricated double-gate TFT is reduced by three orders of magnitude from the range of 10(-9) A/mum to 10(-12) A/mum. The orVoff current ratio is increased by three orders of magnitude accordingly from around 104 to 10(7).
引用
收藏
页码：1490 / 1492
页数：3
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