Low Energy Metric Content Addressable Memory (CAM) with Multi Voltage Matchline Segments

Content addressable memory (CAM) is a hardware implementation of lookup table which performs high speed search operation within a single clock cycle. Search data is compared in parallel with all the stored data and this increases switching activities as well as charging and discharging of capacitive matchlines (MLs). Here, we divide a wordline and ML into segments. For the first reported time the ML segments are precharged to different voltage levels to achieve improved energy metric. One of the segments associated with sub-ML is precharged with a low level of voltage source to reduce the power associated with ML activities. The main ML will discharge only when all the three segments match. Voltage scaling is done carefully in MLs where the switching activity is high to reduce the power consumption without degrading the search speed. A 256 x 144 bit CAM is implemented with novel CAM cells in 45-nm technology node and the post-layout simulation is performed. The averaged energy metric is 0.12 fJ/search/bit for 625 Monte Carlo (MC) simulations with process variations.