Heterogeneous neuromorphic processor based on RISC-V architecture for real-time robotics tasks

被引：1
|
作者：
Zelensky, A. [1 ]
Alepko, A. [1 ,2 ]
Dubovskov, V [1 ,2 ]
Kuptsov, V [1 ]
机构：
[1] Moscow State Univ Technol STANKIN, Moscow, Russia
[2] Sci Mfg Complex Technol Ctr, Zelenograd, Russia
来源：
ARTIFICIAL INTELLIGENCE AND MACHINE LEARNING IN DEFENSE APPLICATIONS II | 2020年 / 11543卷
关键词：
RISC-V ISA; multilayer perceptron; neural networks; FPGA; neuro accelerator; heterogeneous system;
D O I：
10.1117/12.2574470
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
The article discusses a heterogeneous processor based on an open source 64-bit core of the RISC-V architecture, combined with a reconfigurable neural network accelerator. The features of the implementation of a binary matrix neural network on FPGA and its combination with the RISC-V RV64GC core in tasks of cognitive robotics and industrial production are investigated in order to increase safety in the interaction of a robot and a person.
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页数：8
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