Low-temperature poly-Si thin-film transistor with a N2O-plasma ONO multilayer gate dielectric

被引:6
|
作者
Chang, KM [1 ]
Yang, WC
Hung, BF
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu, Taiwan
[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 30039, Taiwan
关键词
D O I
10.1149/1.1753253
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
High-performance polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with oxide/nitride/oxynitride (ONO) multilayer gate dielectrics were fabricated. The low-temperature (less than or equal to300degreesC) ONO multilayer dielectric uses three stacked layers: the bottom layer is a very thin N2O-plasma oxynitride deposited by plasma-enhanced chemical vapor deposition (PECVD), the middle layer is PECVD Si3N4, and the top layer is tetraethoxysilane (TEOS) oxide. The ONO gate dielectric on poly-Si films shows a very high breakdown field of 9.4 MV/cm, a longer time-dependent dielectric breakdown lifetime and a lower charge trapping rate than single-layer PECVD TEOS oxide or nitride. The fabricated poly-Si TFTs with ONO gate dielectric exhibited excellent transfer characteristics, high field-effect mobility of 213 cm(2)/V s, and an ON/OFF current ratio of over 10(8). (C) 2004 The Electrochemical Society.
引用
收藏
页码:G148 / G150
页数:3
相关论文
共 50 条
  • [41] Mobility model of polysilicon thin-film transistor (Poly-Si TFT)
    Gupta, N
    Tyagi, BP
    2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS, 2004, : 950 - 953
  • [42] Double-Gate Two-Step Source/Drain Poly-Si Thin-Film Transistor
    Chien, Feng-Tso
    Hung, Chih-Ping
    Chiu, Hsien-Chin
    Kang, Tsung-Kuei
    Cheng, Ching-Hwa
    Tsai, Yao-Tsung
    COATINGS, 2019, 9 (04):
  • [43] LOW-TEMPERATURE ACTIVATION OF IMPURITIES IMPLANTED BY ION DOPING TECHNIQUE FOR POLY-SI THIN-FILM TRANSISTORS
    MATSUO, M
    NAKAZAWA, T
    OHSHIMA, H
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1992, 31 (12B): : 4567 - 4569
  • [44] Ultra-low temperature poly-Si thin film transistor for plastic substrate
    Kim, DY
    Kwon, JY
    Jung, JS
    Park, KB
    Cho, HS
    Lim, H
    Kim, JM
    Yin, HX
    Zhang, XX
    Noguchi, T
    Noguchi, T
    JOURNAL OF THE KOREAN PHYSICAL SOCIETY, 2006, 48 : S61 - S63
  • [45] Fabrication of high performance low-temperature poly-Si thin-film transistors using a modulated process
    Fan, CL
    Chen, MC
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2002, 149 (04) : H93 - H97
  • [46] Oxide Thinning and Structure Scaling Down Effect of Low-Temperature Poly-Si Thin-Film Transistors
    Ma, William Cheng-Yu
    Chiang, Tsung-Yu
    Lin, Je-Wei
    Chao, Tien-Sheng
    JOURNAL OF DISPLAY TECHNOLOGY, 2012, 8 (01): : 12 - 17
  • [47] Hybrid-type Temperature Sensor using n-type Low-temperature Processed poly-Si Thin-Film Transistors
    Kitajima, Shuhei
    Kito, Katsuya
    Hayashi, Hisashi
    Matsuda, Tokiyoshi
    Kimura, Mutsumi
    2015 IEEE INTERNATIONAL MEETING FOR FUTURE OF ELECTRON DEVICES, KANSAI (IMFEDK), 2015,
  • [48] Thermal Sensor Using Poly-Si Thin-Film Transistor With Widened Detectable Temperature Range
    Nakashima, Akihiro
    Sagawa, Yuki
    Kimura, Mutsumi
    IEEE ELECTRON DEVICE LETTERS, 2011, 32 (03) : 333 - 335
  • [49] Evaluation technique for reliability in low-temperature poly-Si thin film transistors
    Uraoka, Y
    Yano, H
    Hatayama, T
    Fuyuki, T
    JOURNAL OF THE KOREAN PHYSICAL SOCIETY, 2006, 48 : S55 - S60
  • [50] Low-temperature (< 100°C) poly-si thin film fabrication on glass
    Wang, Cheng-Long
    Fan, Duo-Wang
    Sun, Shuo
    Zhang, Fu-Jia
    Liu, Hong-Zhong
    Chinese Physics Letters, 2009, 26 (01)