Low-temperature poly-Si thin-film transistor with a N2O-plasma ONO multilayer gate dielectric

被引:6
|
作者
Chang, KM [1 ]
Yang, WC
Hung, BF
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu, Taiwan
[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 30039, Taiwan
关键词
D O I
10.1149/1.1753253
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
High-performance polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with oxide/nitride/oxynitride (ONO) multilayer gate dielectrics were fabricated. The low-temperature (less than or equal to300degreesC) ONO multilayer dielectric uses three stacked layers: the bottom layer is a very thin N2O-plasma oxynitride deposited by plasma-enhanced chemical vapor deposition (PECVD), the middle layer is PECVD Si3N4, and the top layer is tetraethoxysilane (TEOS) oxide. The ONO gate dielectric on poly-Si films shows a very high breakdown field of 9.4 MV/cm, a longer time-dependent dielectric breakdown lifetime and a lower charge trapping rate than single-layer PECVD TEOS oxide or nitride. The fabricated poly-Si TFTs with ONO gate dielectric exhibited excellent transfer characteristics, high field-effect mobility of 213 cm(2)/V s, and an ON/OFF current ratio of over 10(8). (C) 2004 The Electrochemical Society.
引用
收藏
页码:G148 / G150
页数:3
相关论文
共 50 条
  • [31] A High-Gain Inverter With Low-Temperature Poly-Si Oxide Thin-Film Transistors
    Kim, Hyunho
    Jeong, Duk Young
    Lee, Suhui
    Jang, Jin
    IEEE ELECTRON DEVICE LETTERS, 2019, 40 (03) : 411 - 414
  • [32] Self-Aligned Top-Gate Amorphous Indium Zinc Oxide Thin-Film Transistors Exceeding Low-Temperature Poly-Si Transistor Performance
    Park, Jae Chul
    Lee, Ho-Nyeon
    Im, Seongil
    ACS APPLIED MATERIALS & INTERFACES, 2013, 5 (15) : 6990 - 6995
  • [33] Effects of Channel Type and Doping on Hysteresis in Low-Temperature Poly-Si Thin-Film Transistors
    Lee, Jaeseob
    Choi, Byoungdeog
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 65 (03) : 986 - 994
  • [34] Blue laser diode annealing-enhanced bottom-gate low-temperature Poly-Si thin-film transistors
    Xu, Hongyuan
    Wang, Xu
    Hu, Daobing
    Zheng, Feng
    Xiao, Juncheng
    Lu, Lei
    Zhang, Shengdong
    MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 2022, 152
  • [35] Organic light-emitting diode display pixel circuit employing double-gate low-temperature poly-Si thin-film transistor and metal-oxide thin-film transistors
    Lee, JoonHo
    Kim, DaeHyun
    Yang, JooWon
    Moon, KookChul
    Lee, Soo-Yeon
    Jeon, JaeHong
    Kim, YongSang
    Choi, SeungChan
    Chung, UiJin
    Park, KwonShik
    Park, KeeChan
    JOURNAL OF THE SOCIETY FOR INFORMATION DISPLAY, 2020, 28 (12) : 1003 - 1011
  • [36] High temperature crystallized poly-Si on molybdenum substrates for thin-film transistor application
    Park, JH
    Kim, DY
    Ko, JK
    Yi, JS
    POLYCRYSTALLINE SEMICONDUCTORS VII, PROCEEDINGS, 2003, 93 : 13 - 17
  • [37] Low-temperature processable and photo-crosslinkable polyimide gate dielectric for flexible thin-film transistor
    Lee, Jae Kyung
    Yi, Mi Hye
    Ahn, Taek
    MOLECULAR CRYSTALS AND LIQUID CRYSTALS, 2023, 764 (01) : 70 - 80
  • [38] High-Performance Poly-Si Thin-Film Transistor With High-k ZrTiO4 Gate Dielectric
    Park, Jae Hyo
    Jang, Gil Su
    Kim, Hyung Yoon
    Lee, Sol Kyu
    Joo, Seung Ki
    IEEE ELECTRON DEVICE LETTERS, 2015, 36 (09) : 920 - 922
  • [39] The effects of preoxidation by N2O plasma on the silicon dioxide as a gate insulator of poly-Si thin film transistor on a flexible substrate application
    Park, Joong-Hyun
    Han, Sang-Myeon
    Park, Sang-Geun
    Choi, Sung-Hwan
    Lee, Woo-Chul
    Jung, Ji-Sim
    Kwon, Jang-Yeon
    Han, Min-Koo
    IDW '06: PROCEEDINGS OF THE 13TH INTERNATIONAL DISPLAY WORKSHOPS, VOLS 1-3, 2006, : 743 - +
  • [40] A new bottom-gated poly-Si thin-film transistor
    Choi, KY
    Park, KC
    Park, CM
    Han, MK
    IEEE ELECTRON DEVICE LETTERS, 1999, 20 (04) : 170 - 172