Detection of electron trap generation due to constant voltage stress on high-k gate stacks

被引：20

作者：

Young, C. D. ^{[1
]}

Nadkarni, S. ^{[1
]}

Heh, D. ^{[4
]}

Harris, H. R. ^{[2
]}

Choi, R. ^{[1
]}

Peterson, J. J. ^{[1
]}

Sim, J. H. ^{[1
]}

Krishnan, S. A. ^{[1
]}

Barnett, J. ^{[1
]}

Vogel, E. ^{[4
]}

Lee, B. H. ^{[3
]}

Zeitzoff, P. ^{[1
]}

Brown, G. A. ^{[1
]}

Bersuker, G. ^{[1
]}

机构：

[1] SEMATECH, 2706 Montopolis Dr, Austin, TX 78741 USA

[2] AMD, Sunnyvale, CA USA

[3] IBM Corp, Armonk, NY USA

[4] Natl Inst Stand & Technol, Gaithersburg, MD 20899 USA

来源：

2006 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 44TH ANNUAL | 2006年

关键词：

high-k; trap generation; charge pumping; trapped charge;

D O I：

10.1109/RELPHY.2006.251211

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Positive constant voltage stress combined with charge pumping (CP) measurements was applied to study trap generation phenomena in SiO2/HfO2/TiN stacks. Using the analysis for frequency-dependent CP data developed to address depth profiling of the electron traps, we have determined that the voltage stress-induced generation of the defects contributing to threshold voltage instability in high-kappa gate stacks occurs primarily within the interfacial SiO2 layer (IL) on the as-grown "precursor" defects most likely caused by the overlaying HfO2 layer. These results point to the IL as a major focus for reliability improvement of high-kappa stacks.

引用

页码：169 / +

页数：3

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