EMC performance analysis of a Processor/Memory System using PCB and Package-On-Package

被引：0
|
作者：
Sicard, Etienne [1 ]
Boyer, Alexandre [1 ]
Fernandez-Lopez, Priscila [2 ]
Zhou, An [3 ]
Marier, Nicolas [2 ]
Lafon, Frederic [2 ]
机构：
[1] Univ Toulouse, INSA, 135 Av Rangueil, F-31077 Toulouse, France
[2] VALEO GEEDS, F-94046 Creteil, France
[3] VALEO, F-93000 Bobigny, France
来源：
2015 10TH INTERNATIONAL WORKSHOP ON THE ELECTROMAGNETIC COMPATIBILITY OF INTEGRATED CIRCUITS | 2015年
关键词：
Signal integrity; EMC; Microcontroller and memory; PoP; Equivalent bus model; Near-Field Scan; IBIS;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, the signal integrity (SI) and Electromagnetic Compatibility (EMC) performance of System-On-Chip (SoC) and stacked memory using Package-On-Package (PoP) technology is investigated. The reconfiguration of the IC-EMC software platform to PoP is described. From an existing 2D assembly using a discrete 65-nm SoC product, the benefits of PoP integration using a next-generation (NG) 28-nm product with stacked memory are analyzed, based on simulation and predictive analysis performed using IC-EMC software platform.
引用
收藏
页码：238 / 243
页数：6
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