DEVELOPMENT OF THE LDPC CODER-DECODER OF THE DVB-S2 STANDARD ON FPGA

Forward error correction (FEC) is a mandatory step in the processing of information in modern digital communication channels. Encoding methods are constantly improved. Today's most popular FEC codes are low-density parity check codes (LDPC). The paper presents the results of the development on the FPGA the encoder and the decoder of LDPC codes compatible with the standard DVB-S2. Parametrized FE. modules with the ability to use several coding rates and two frames types of the standard were developed. In this paper, proposed architectures of coder and decoder, methods for improving performance and used resources of FPGA are presented.