A new RNS FIR filter architecture

被引:0
|
作者
Cardarilli, GC
Re, M
Lojacono, R
机构
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a last architecture for the implementation of FIR filters based on Residue Number System is proposed. High-speed is obtained introducing the residue arithmetic that permits the computation of the filter output by using N FIR subfilters of reduced dynamic range operating in parallel. Moreover, a new approach for the computation of the module operation on each term of the linear combination has been developed. The filter implementation is based on small look-up tables and fast multioperand carry-save adders.
引用
收藏
页码:671 / 674
页数:4
相关论文
共 50 条
  • [41] A Reconfigurable High-speed Spiral FIR Filter Architecture
    Figuli, Shalina Percy Delicia
    Figuli, Peter
    Becker, Juergen
    2017 40TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP), 2017, : 532 - 537
  • [42] Subthreshold FIR Filter Architecture for Ultra Low Power Applications
    Mishra, Biswajit
    Al-Hashimi, Bashir M.
    INTEGRATED CIRCUIT AND SYSTEMS DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, 2009, 5349 : 1 - 10
  • [43] Optimization Technique of FIR Filter using Digit Serial Architecture
    Rewatkar, Rajendra M.
    Badjate, Sanjay L.
    2013 INTERNATIONAL CONFERENCE ON GREEN COMPUTING, COMMUNICATION AND CONSERVATION OF ENERGY (ICGCE), 2013, : 339 - 344
  • [44] A novel pipelined neural FIR architecture for nonlinear adaptive filter
    Le, Dinh Cong
    Zhang, Jiashu
    Pang, Yanjie
    NEUROCOMPUTING, 2021, 440 : 220 - 229
  • [45] ASIC implementation of distributed arithmetic based FIR filter using RNS for high speed DSP systems
    Jyothi, Grande Naga
    Sanapala, Kishore
    Vijayalakshmi, A.
    INTERNATIONAL JOURNAL OF SPEECH TECHNOLOGY, 2020, 23 (02) : 259 - 264
  • [46] A hybrid CSA tree for merged arithmetic architecture of FIR filter
    Ye, Z
    Chang, CH
    ISPA 2003: PROCEEDINGS OF THE 3RD INTERNATIONAL SYMPOSIUM ON IMAGE AND SIGNAL PROCESSING AND ANALYSIS, PTS 1 AND 2, 2003, : 449 - 453
  • [47] An Efficient Modified Distributed Arithmetic Architecture Suitable for FIR Filter
    Narendiran, S.
    Jayakumar, E. P.
    2021 SIXTH INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, SIGNAL PROCESSING AND NETWORKING (WISPNET), 2021, : 89 - 93
  • [48] Shift Add Approach Based Implementation of RNS-FIR Filter using Modified Product Encoder
    Reddy, Kotha Srinivasa
    Bajaj, Sumit
    Kumar, Sahoo Subhendu
    TENCON 2014 - 2014 IEEE REGION 10 CONFERENCE, 2014,
  • [49] ASIC implementation of distributed arithmetic based FIR filter using RNS for high speed DSP systems
    Grande Naga Jyothi
    Kishore Sanapala
    A. Vijayalakshmi
    International Journal of Speech Technology, 2020, 23 : 259 - 264
  • [50] A Reconfigurable FIR Filter Architecture to Trade Off Filter Performance for Dynamic Power Consumption
    Lee, Seok-Jae
    Choi, Ji-Woong
    Kim, Seon Wook
    Park, Jongsun
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 19 (12) : 2221 - 2228