共 50 条
- [41] A Reconfigurable High-speed Spiral FIR Filter Architecture 2017 40TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP), 2017, : 532 - 537
- [42] Subthreshold FIR Filter Architecture for Ultra Low Power Applications INTEGRATED CIRCUIT AND SYSTEMS DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, 2009, 5349 : 1 - 10
- [43] Optimization Technique of FIR Filter using Digit Serial Architecture 2013 INTERNATIONAL CONFERENCE ON GREEN COMPUTING, COMMUNICATION AND CONSERVATION OF ENERGY (ICGCE), 2013, : 339 - 344
- [46] A hybrid CSA tree for merged arithmetic architecture of FIR filter ISPA 2003: PROCEEDINGS OF THE 3RD INTERNATIONAL SYMPOSIUM ON IMAGE AND SIGNAL PROCESSING AND ANALYSIS, PTS 1 AND 2, 2003, : 449 - 453
- [47] An Efficient Modified Distributed Arithmetic Architecture Suitable for FIR Filter 2021 SIXTH INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, SIGNAL PROCESSING AND NETWORKING (WISPNET), 2021, : 89 - 93
- [48] Shift Add Approach Based Implementation of RNS-FIR Filter using Modified Product Encoder TENCON 2014 - 2014 IEEE REGION 10 CONFERENCE, 2014,
- [49] ASIC implementation of distributed arithmetic based FIR filter using RNS for high speed DSP systems International Journal of Speech Technology, 2020, 23 : 259 - 264