共 50 条
- [1] An ILP approach to surge current minimization in high-level synthesis IEICE ELECTRONICS EXPRESS, 2009, 6 (14): : 979 - 985
- [2] High level synthesis with multiple supply voltages for energy and combined peak power minimization 2006 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, 2006, : 864 - +
- [3] ILP models for energy and transient power minimization during behavioral synthesis 17TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: DESIGN METHODOLOGIES FOR THE GIGASCALE ERA, 2004, : 745 - 748
- [4] Power fluctuation minimization during behavioral synthesis using ILP-based datapath scheduling 21ST INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, PROCEEDINGS, 2003, : 441 - 443
- [7] On Determination of Instantaneous Peak and Cycle Peak Switching using ILP 2016 20TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2016,
- [8] Natural Computation for Optimal Scheduling with ILP Modeling in High Level Synthesis PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGIES, ICICT 2014, 2015, 46 : 167 - 175
- [9] ILP-based Modulo Scheduling for High-level Synthesis 2016 INTERNATIONAL CONFERENCE ON COMPILERS, ARCHITECTURE AND SYNTHESIS FOR EMBEDDED SYSTEMS (CASES), 2016,
- [10] An ILP formulation for reliability-oriented high-level synthesis 6th International Symposium on Quality Electronic Design, Proceedings, 2005, : 364 - 369