A Reliable Fault Classifier for Dependable Systems on SRAM-based FPGAs

被引：0

作者：

Bolchini, Cristiana ^{[1
]}

Sandionigi, Chiara ^{[1
]}

Fossati, Luca ^{[2
]}

Codinachs, David Merodio ^{[2
]}

机构：

[1] Politecn Milan, Dipartimento Elettron & Informaz, I-20133 Milan, Italy

[2] European Space Agcy, NL-2200 AG Noordwijk, Netherlands

来源：

2011 IEEE 17TH INTERNATIONAL ON-LINE TESTING SYMPOSIUM (IOLTS) | 2011年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents an algorithm for the discrimination of faults in FPGAs based on their recovery possibility; some faults can be recovered by reconfiguring the faulty part of the device, others have a destructive effect. After classification has been carried out, the suitable fault recovery strategy is applied, with the final aim of enabling the exploitation of FPGAs, in particular SRAM-based ones, for critical applications, such as the ones in the space environment. In this scenario, we investigate the reliable implementation of the fault classification algorithm, that can be so integrated in an overall reliable system.

引用

页数：6

共 50 条

[41] Estimating Power Consumption of Multiple Modular Redundant Designs in SRAM-based FPGAs for High Dependable Applications
Tarrillo, Jimmy
Kastensmidt, Fernanda Lima
2014 24TH INTERNATIONAL WORKSHOP ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS), 2014,
[42] Soft error mitigation for SRAM-based FPGAs
Asadi, GH
Tahoori, MB
23RD IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2005, : 207 - 212
[43] Delay calculation method for SRAM-based FPGAs
Katayama, M
Takahara, A
Miyazaki, T
Fukami, K
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1997, E80A (10): : 1789 - 1794
[44] SRAM-Based FPGAs: A structural test approach
Renovell, M
XI BRAZILIAN SYMPOSIUM ON INTEGRATED CIRCUIT DESIGN, PROCEEDINGS, 1998, : 67 - 72
[45] SRAM-BASED FPGAS EASE PCMCIA DESIGN
FAWCETT, B
ELECTRONIC DESIGN, 1995, 43 (21) : 114 - &
[46] Power optimization techniques for SRAM-based FPGAs
Mondal, Somsubhra
Memik, Seda Ogrenci
2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, 2006, : 959 - +
[47] Fast testable design for SRAM-based FPGAs
Doumar, A
Ohmameuda, T
Ito, H
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2000, E83D (05): : 1116 - 1127
[48] Fast testable design for SRAM-based FPGAs
Doumar, Abderrahim, 2000, IEICE of Japan, Tokyo, Japan (E83-D)
[49] On the evaluation of SEU sensitiveness in SRAM-based FPGAs
Bernardi, P
Reorda, MS
Sterpone, L
Violante, M
10TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS, 2004, : 115 - 120
[50] Testing for the programming circuit of SRAM-based FPGAs
Michinishi, H
Yokohira, T
Okamoto, T
Inoue, T
Fujiwara, H
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 1999, E82D (06): : 1051 - 1057

← 1 2 3 4 5 →