On testing of Josephson logic circuits consisting of RSFQ dual-rail gates

被引：0
|
作者：
Yamada, T [1 ]
Hanashima, T [1 ]
Suemori, Y [1 ]
Maezawa, M [1 ]
机构：
[1] Meiji Univ, Dept Comp Sci, Tama Ku, Kawasaki, Kanagawa 2148571, Japan
来源：
SEVENTH ASIAN TEST SYMPOSIUM (ATS'98), PROCEEDINGS | 1998年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We have specified typical fabrication defects of the rapid single-flux-quantum (RSFQ) based logic gates, and then investigated the behavior of defective gates by SPICE simulation to estimate the defect coverage of logic testing. The simulation results shaw that the logic testing based on the stuck-cat fault model can achieve at moat 65% defect coverage for pulse-driven dual-rail RSFQ logic circuits and the defect coverage mag increase up to 80% by properly adding two-pattern teats to the stuck-at fault tests.
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页码：222 / 227
页数：6
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