共 50 条
- [1] Custom Test Chip for System-level ESD Investigations 2014 36TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2014,
- [3] Improving Mobile Device Security with Operating System-Level Virtualization SECURITY AND PRIVACY PROTECTION IN INFORMATION PROCESSING SYSTEMS, 2013, 405 : 148 - 161
- [4] System-level ESD Failure Analysis Depending on Source Generators 2016 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC), 2016, : 289 - 291
- [5] S-Parameter Based Modeling of System-level ESD Test Bed 2015 37TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2015,
- [6] Failure of on-chip power-fall ESD clamp circuits during system-level ESD test 2007 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 45TH ANNUAL, 2007, : 598 - +
- [7] A Study on Transmission Line Modeling Method for System-level ESD Stress Simulation 2015 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC), 2015, : 577 - 580
- [8] Improving Microcontroller (MCU) Immunity Performance to System-Level ESD/EFT Testing through PCB System Co-Design Methodology 2014 36TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2014,
- [9] Modeling of the Test-Fixture/Horizontal Coupling Plane Interaction in System-Level ESD Test Setups 2014 36TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2014,