Functional decomposition with application to LUT-based FPGA synthesis

被引：0

作者：

Qiao, J ^{[1
]}

Asada, K

机构：

[1] Univ Tokyo, Grad Sch Elect Engn, Tokyo 1138656, Japan

[2] Univ Tokyo, VLSI Design & Educ Ctr, Tokyo 1138656, Japan

来源：

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES | 2001年 / E84A卷 / 08期

关键词：

logic synthesis; functional decomposition; compatibility class encoding; LUT-based FPCAs;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper. we deal with the problem of compatibility class encoding, and propose a novel algorithm for finding a good functional decomposition with application to LUT-based FPGA synthesis. Based on exploration of the design space, we concentrate on extracting a set of <(<alpha>)over right arrow> components, which can be merged into the minimum number of multiple-output CLBS or LUTs, such that the decomposition constructed from these components is also minimal. In particular, to explore more degrees of freedom, we introduce pliable encoding to take over the conventional rigid encoding when it fails to find a satisfactory decomposition by rigid encoding. Experimental results on a large set of MCNC91 logic synthesis benchmarks show that our method is quite promising.

引用

页码：2004 / 2013

页数：10

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