Barrier reliability of ALD TaN on sub-100 nm copper low-k interconnects

被引:0
|
作者
Tokei, Z [1 ]
Gailledrat, T [1 ]
Li, YL [1 ]
Schuhmacher, J [1 ]
Mandrekar, T [1 ]
Guggilla, S [1 ]
Mebarki, B [1 ]
Maex, K [1 ]
机构
[1] IMEC, B-3001 Heverlee, Belgium
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
RC-delay performance and barrier reliability of an ALD TaN + PVD flash barrier was compared to PVD only barriers. The integration of an ALD TaN + PVD flash barrier results in lower leakage current than PVD schemes both at room temperature and at elevated temperature. Time Dependent Dielectric Breakdown experiments showed that an ALD + PVD flash barrier integrated with an SiOC:H low-k material leads to an interconnect lifetime above 10 years.
引用
收藏
页码:801 / 805
页数:5
相关论文
共 50 条
  • [31] High-Etching-Selectivity Barrier SiC (k < 3.5) Film for 32-nm-Node Copper/Low-k Interconnects
    Nakahira, Junya
    Nagano, Shuji
    Gawase, Akifumi
    Ohashi, Yoshi
    Shimizu, Hideharu
    Chikaki, Shinichi
    Oda, Noriaki
    Kondo, Seiichi
    Hasaka, Satoshi
    Saito, Shuichi
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2010, 49 (05) : 05FD041 - 05FD048
  • [32] Copper/low-k interconnects for smaller and faster circuits
    Hareesh Mavoori
    JOM, 1999, 51 : 36 - 36
  • [33] Surface wave metrology for copper/low-k interconnects
    Gostein, M
    Maznev, AA
    Mazurenko, A
    Tower, J
    CHARACTERIZATION AND METROLOGY FOR ULSI TECHNOLOGY 2005, 2005, 788 : 496 - 500
  • [34] Copper/low-k interconnects for smaller and faster circuits
    Mavoori, H
    JOM-JOURNAL OF THE MINERALS METALS & MATERIALS SOCIETY, 1999, 51 (09): : 36 - 36
  • [35] The Simplest Modification of Cu Diffusion Barrier Dielectrics to Improve Cu/Low-k Interconnects Reliability
    Goto, Kinya
    Oka, Yoshihiro
    Suzumura, Naohito
    Shibata, Ryuji
    Furuhashi, Takahisa
    Matsumoto, Masahiro
    Kawamura, Takeshi
    Matsuura, Masazumi
    Fujisawa, Masahiko
    Asai, Koyu
    2011 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE AND MATERIALS FOR ADVANCED METALLIZATION (IITC/MAM), 2011,
  • [36] A 90nm generation copper dual damascene technology with ALD TaN barrier
    Peng, CH
    Hsieh, CH
    Huang, CL
    Lin, JC
    Tsai, MH
    Lin, MW
    Chang, CL
    Shue, WS
    Liang, MS
    INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, 2002, : 603 - 606
  • [37] Copper dual Damascene interconnects with very low-k dielectrics targeting for 130 nm node
    Kudo, H
    Yoshie, K
    Yamaguchi, S
    Watanabe, K
    Ikeda, M
    Kakamu, K
    Hosoda, T
    Ohhira, K
    Santoh, N
    Misawa, N
    Matsuno, K
    Wakasugi, Y
    Hasegawa, A
    Nagase, K
    Suzuki, T
    PROCEEDINGS OF THE IEEE 2000 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2000, : 270 - 272
  • [38] Electrical and reliability characterization of CuMn self forming barrier interconnects on low-k CDO dielectrics
    Indukuri, Tejaswi K.
    Akolkar, Rohan N.
    Clarke, James S.
    Genc, Arda
    Gstrein, Florian
    Harmes, Michael C.
    Miner, Barbara
    Xia, Feng
    Zierath, Daniel J.
    Balakrishnan, Sridhar
    MICROELECTRONIC ENGINEERING, 2012, 92 : 49 - 52
  • [39] Formation and characterization of low resistivity sub-100 nm copper films deposited by electroless on SAM
    Asher, T.
    Inberg, A.
    Glickman, E.
    Fishelson, N.
    Shacham-Diamand, Y.
    ELECTROCHIMICA ACTA, 2009, 54 (25) : 6053 - 6057
  • [40] Impacts of low-k film on sub-100nm-node, ULSI devices
    Hayashi, Y
    PROCEEDINGS OF THE IEEE 2002 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2002, : 145 - 147