On the Design of Low-Power Hybrids for Full Duplex Simultaneous Bidirectional Signaling Links

This paper investigates the suitability of full duplex simultaneous bidirectional (FD-SBD) signaling as a method to theoretically double the aggregate data transfer per pin for ultra-short-reach links. Advantages as well as challenges associated with differential FD-SBD links are described, and comparisons are made with single-ended and multilevel signaling schemes. FD-SBD links require a hybrid to recover the weak received signal from the large self-interfering transmitted signal. After providing a summary of prior-art high-speed hybrids, which often utilize replica drivers and current-mode signaling, two voltage-mode hybrids are presented and compared to enable low-power FD-SBD links at high data rates without using any replica drivers. This includes an R-G(m) driver, as well as a resistor-bridge driver derived from a Wheatstone-bridge. It is shown that maintaining a uniform termination impedance is important to support FD-SBD signaling on low insertion-loss links. Accordingly, a resistor-bridge hybrid utilizing an averaging resistor embedded in the output transimpedance amplifier based voltage-mode driver is implemented. A prototype implemented in a 65 nm CMOS process is measured within a transceiver front-end at an aggregate data rate of 15 Gb/s over a short differential channel with 2.5 dB insertion loss at 3.75 GHz on a 4-layer FR4 PCB. The energy/bit for the transceiver front-end is 1.35 pJ/b at an aggregate data rate of 15 Gb/s.