DESIGN METHODOLOGY FOR LOW-POWER FULL CUSTOM RISC MICROPROCESSORS

被引：0
|
作者：
ANSORGE, M [1 ]
PIGUET, C [1 ]
DIJKSTRA, E [1 ]
机构：
[1] CTR SUISSE ELECTR & MICROTECH SA,CH-2000 NEUCHATEL 7,SWITZERLAND
来源：
MICROPROCESSING AND MICROPROGRAMMING | 1986年 / 18卷 / 1-5期
关键词：
D O I：
10.1016/0165-6074(86)90073-6
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：427 / 434
页数：8
相关论文
共 50 条
  • [1] Design methodology of low-power microprocessors
    Hattori, T
    ASP-DAC 2003: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2003, : 390 - 393
  • [2] Design Methodology for Low-Power Embedded Microprocessors
    Manuzzato, Andrea
    Campi, Fabio
    Liberali, Valentino
    Pandini, Davide
    2013 23RD INTERNATIONAL WORKSHOP ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS), 2013, : 259 - +
  • [3] Design Methodology for Low-Power Embedded Microprocessors
    Manuzzato, Andrea
    Campi, Fabio
    Liberali, Valentino
    Pandini, Davide
    2013 23RD INTERNATIONAL WORKSHOP ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS), 2013, : 251 - +
  • [4] DESIGN EFFORTS LEARNED FOR LOW-POWER RISC PROCESSORS
    KAWASAKI, S
    ELECTRONIC DESIGN, 1995, 43 (01) : 58 - 58
  • [5] LOW-POWER MULTIMEDIA RISC
    NADEHARA, K
    KURODA, I
    DAITO, M
    NAKAYAMA, T
    IEEE MICRO, 1995, 15 (06) : 20 - 29
  • [6] OPTIMIZED DESIGN METHOD FOR FULL-CUSTOM MICROPROCESSORS
    USAMI, K
    IWAMURA, J
    PROCEEDINGS OF THE IEEE 1989 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1989, : 563 - 567
  • [7] A Low-Power Instruction Replay Mechanism for Design of Resilient Microprocessors
    Rodrigues, Range
    Annamalai, Arunachalam
    Kundu, Sandip
    ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2014, 13 (04)
  • [8] A cost-oriented two-port unified cache for low-power RISC microprocessors
    Mizuno, H
    Ishibashi, K
    1996 SYMPOSIUM ON VLSI CIRCUITS - DIGEST OF TECHNICAL PAPERS, 1996, : 72 - 73
  • [9] Low-power design methodology: Power estimation and optimization
    Najm, FN
    40TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 1998, : 1124 - 1129
  • [10] Low-power methodology and design techniques for processor design
    Australian Electronics Engineering, 1999, 32 (01):
12345