共 50 条
- [41] Design and Performance Analysis of Low-Power Hybrid Full Adder Circuit JOURNAL OF ACTIVE AND PASSIVE ELECTRONIC DEVICES, 2021, 16 (01): : 13 - 23
- [43] Single-Event Effects in Low-Cost, Low-Power Microprocessors 2014 IEEE RADIATION EFFECTS DATA WORKSHOP (REDW), 2014,
- [44] Sensitive Registers: a Technique for Reducing the Fetch Bandwidth in Low-Power Microprocessors GLSVLSI'07: PROCEEDINGS OF THE 2007 ACM GREAT LAKES SYMPOSIUM ON VLSI, 2007, : 138 - 143
- [46] Low-power design methodology for an on-chip bus with adaptive bandwidth capability 40TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2003, 2003, : 628 - 633
- [48] Low-Power Mobile Processor Design for Full-HD Video Coding IDW'10: PROCEEDINGS OF THE 17TH INTERNATIONAL DISPLAY WORKSHOPS, VOLS 1-3, 2010, : 2161 - 2164
- [49] A design methodology for high-speed low-power mcml frequency dividers 2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3, 2006, : 1308 - +