A BENDING N-WELL BALLAST LAYOUT TO IMPROVE ESD ROBUSTNESS IN FULLY-SILICIDED CMOS TECHNOLOGY

被引：1

作者：

Wen, Yong-Ru ^{[1
]}

Ker, Ming-Dou ^{[1
]}

Chen, Wen-Yi ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Inst Elect, Hsinchu 30039, Taiwan

来源：

2010 INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM | 2010年

关键词：

D O I：

10.1109/IRPS.2010.5488718

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Ballast technique has been reported as a cost effective method to improve ESD robustness of fully-silicided devices without using silicide block. In this work, a new ballast technique, the bending N-Well (BNW) ballast structure, is proposed to enhance ESD robustness of fully-silicided NMOS. With a deep N-Well to cover the fully-silicided NMOS with BNW ballast structure, ESD robustness of the NMOS can be further improved by enhancing the turn-on uniformity among the multi-fingers of the NMOS.

引用

页码：857 / 860

页数：4

共 49 条

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