共 50 条
- [1] Signature based diagnosis for logic BIST 2006 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2006, : 265 - +
- [4] Hierarchical compactor design for diagnosis in deterministic logic BIST 23RD IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2005, : 359 - 365
- [5] Logic BIST Silicon Debug and Volume Diagnosis Methodology 2011 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2011,
- [6] On reducing aliasing effects and improving diagnosis of logic BIST failures INTERNATIONAL TEST CONFERENCE 2003, PROCEEDINGS, 2003, : 737 - 744
- [7] Scan-based ATPG or logic BIST? INTERNATIONAL TEST CONFERENCE 2001, PROCEEDINGS, 2001, : 1183 - 1183
- [8] Logic BIST Architecture for System-Level Test and Diagnosis 2009 ASIAN TEST SYMPOSIUM, PROCEEDINGS, 2009, : 21 - +
- [9] PCA based programmable path signature analysis in BIST 2002 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS AND WEST SINO EXPOSITION PROCEEDINGS, VOLS 1-4, 2002, : 1227 - 1229
- [10] PCA based switch paths signature analysis in BIST ICEMI'2001: FIFTH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT AND INSTRUMENTS, VOL 1, CONFERENCE PROCEEDINGS, 2001, : 467 - 470