Performances under saturation operation of p-channel FinFETs on SOI substrates at cryogenic temperature

被引：0
|
作者：
Achour, H. [1 ]
Cretu, B. [2 ,3 ]
Routoure, J. -M. [1 ,3 ]
Carin, R. [1 ,3 ]
Benfdila, A. [4 ]
Simoen, E. [5 ]
Claeys, C. [5 ,6 ]
机构：
[1] Univ Caen Basse Normandie, UMR 6072, GREYC, F-14050 Caen, France
[2] ENSICAEN, UMR 6072, GREYC, F-14050 Caen, France
[3] CNRS, UMR 6072, GREYC, F-14032 Caen, France
[4] Mouloud Mammeri Univ Tizi Ouzou, GRMNT, Tizi Ouzou, Algeria
[5] IMEC, B-3001 Leuven, Belgium
[6] Katholieke Univ Leuven, EE Dept, B-3001 Leuven, Belgium
来源：
2014 INTERNATIONAL SEMICONDUCTOR CONFERENCE (CAS) | 2014年
关键词：
FinFET; SOI; strain; DIBL; Early voltage; intrinsic gain; low frequency noise; LOW-FREQUENCY NOISE; GATE STACK; DEVICES; MOSFETS; 77-K;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The impact of cryogenic temperature operation on the short channel effects and analog performances was analysed on strained and unstrained p-channel SOI FinFETs. The main electrical parameters extracted from the saturation mode of operation are investigated and compared to those found at room temperature. Low frequency noise measurements at 10 K operation show that the carrier number fluctuations dominate the flicker noise in moderate inversion, while the access resistance noise contributions prevail in strong inversion.
引用
收藏
页码：181 / 184
页数：4
相关论文
共 50 条
  • [31] Comparison of hole mobility in LOGOS-isolated thin-film SOI p-channel MOSFET's fabricated on various SOI substrates
    Lee, JW
    Kim, HK
    Yang, JW
    Lee, WC
    Oh, JH
    Oh, MR
    Koh, YH
    IEEE ELECTRON DEVICE LETTERS, 1999, 20 (04) : 176 - 178
  • [32] A novel p-channel SOI LDMOS transistor with tapered field oxides
    Kim, J
    Kim, SG
    Roh, TM
    Koo, JG
    Nam, KS
    ISPSD '98 - PROCEEDINGS OF THE 10TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, 1998, : 375 - 378
  • [33] SOA improvement of p-channel high-voltage SOI devices
    Schwantes, S
    Graf, M
    Dudek, V
    PROCEEDINGS OF ESSDERC 2005: 35TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2005, : 237 - 240
  • [34] Characteristics of P-channel SOI LDMOS transistor with tapered field oxides
    Kim, J
    Kim, SG
    Roh, TM
    Park, HS
    Koo, JG
    Kim, DY
    ETRI JOURNAL, 1999, 21 (03) : 22 - 28
  • [35] Hot-carrier effects in p-channel modified Schottky-barrier FinFETs
    Lin, CP
    Tsui, BY
    IEEE ELECTRON DEVICE LETTERS, 2005, 26 (06) : 394 - 396
  • [36] Gate-Length-Dependent Strain Effect in n- and p-Channel FinFETs
    Song, Jooyoung
    Yu, Bo
    Xiong, Weize
    Taur, Yuan
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2009, 56 (03) : 533 - 536
  • [37] Initial Results from a Cryogenic Proton Irradiation of a p-channel CCD
    Gow, J. P. D.
    Wood, D.
    Burt, D.
    Hall, D. J.
    Dryer, B.
    Holland, A. D.
    Murray, N. J.
    UV, X-RAY, AND GAMMA-RAY SPACE INSTRUMENTATION FOR ASTRONOMY XIX, 2015, 9601
  • [38] Design issues of a thin-film p-channel SOI power MOSFET for high-temperature applications
    Yoshimura, Masayuki
    Uchida, Atsushi
    Matsumoto, Satoshi
    MICROELECTRONICS RELIABILITY, 2013, 53 (9-11) : 1778 - 1782
  • [39] Comparison between nonlinear characteristics of N-channel and P-channel FD SOI MOSFETs
    Conde, JE
    Cerdeira, A
    Flandre, D
    ICCDCS 2004: Fifth International Caracas Conference on Devices, Circuits and Systems, 2004, : 122 - 125
  • [40] SUBTHRESHOLD SLOPE OF LONG-CHANNEL, ACCUMULATION-MODE P-CHANNEL SOI MOSFETS
    COLINGE, JP
    FLANDRE, D
    VANDEWIELE, F
    SOLID-STATE ELECTRONICS, 1994, 37 (02) : 289 - 294
12345