共 50 条
- [41] Memory Partitioning-Based Modulo Scheduling for High-level Synthesis 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017, : 2671 - 2674
- [43] Description method for high-level synthesis of histogram generation and their evaluation IEIE Transactions on Smart Processing and Computing, 2019, 8 (03): : 178 - 185
- [45] OPTIMIZATIONS IN HIGH-LEVEL SYNTHESIS MICROPROCESSING AND MICROPROGRAMMING, 1986, 18 (1-5): : 347 - 352
- [48] Introduction to high-level synthesis IEEE Design and Test of Computers, 1600, 11 (04): : 44 - 54
- [50] A high-level synthesis method for weakly testable data baths SEVENTH ASIAN TEST SYMPOSIUM (ATS'98), PROCEEDINGS, 1998, : 40 - 45