A LOW POWER BIST SCHEME BASED ON BLOCK ENCODING

With the development of integrated circuit manufacturing technology, low power test has become a focus of concern during testing fields. This paper proposes a new low power BIST (built-in self test) scheme based on block encoding which first exploit a block re-encoding method to optimize the test cube, and then a low power test based on LFSR (linear feedback shift register) reseeding is applied. According to the compatibility of flag, the scheme proposes a grouping algorithm based on flag to divide and reorder the test cubes in the test cube set. Experimental results show that the scheme not only obtain better test compression ratio and test data storage, but also reduce the test power consumption effectively.