Assessment of Heterojunction SiGe Tunnel-FET for Low-Power Digital Circuits

被引：0

作者：

Maiti, C. K. ^{[1
]}

Dash, T. P. ^{[1
]}

Das, S. ^{[1
]}

机构：

[1] Siksha O Anusandhan Univ, Dept Elect & Commun Engn, Bhubaneswar 751030, Odisha, India

来源：

PROCEEDINGS OF 2ND INTERNATIONAL CONFERENCE ON 2017 DEVICES FOR INTEGRATED CIRCUIT (DEVIC) | 2017年

关键词：

Heterostructure Tunnel FET; strained-SiGe; Heterogeneous Integration; TRANSISTORS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

To overcome the fundamental limitations of conventional MOSFETs, tunneling field effect transistors (TFETs) with strained-SiGe channel (via heterogeneous integration) may be used and is demonstrated using simulation. We mainly focus on the design and implementation of silicon germanium based tunnel field effect transistor, aiming to reduce the device operation voltage down to below 0.5V. Performance improvement in drain current as high as 200% has been achieved.

引用

页码：336 / 340

页数：5

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