Calculation of effective dielectric constants for advanced interconnect structures with low-k dielectrics

被引:13
|
作者
Rhee, SH
Radwin, MD
Ng, MF
Martin, JI
Erb, D
机构
[1] Adv Micro Devices Inc, AMD IBM Sony Toshiba Alliance, Technol Dev Grp, Hopewell Jct, NY 12533 USA
[2] Adv Micro Devices Inc, Technol Dev Grp, Sunnyvale, CA 94088 USA
关键词
Interconnect structures;
D O I
10.1063/1.1614438
中图分类号
O59 [应用物理学];
学科分类号
摘要
Effective dielectric constants of advanced interconnects with low-k and ultra-low-k dielectrics were evaluated by two-dimensional capacitance analysis. The analysis was performed for interconnect design rules proposed for 65 nm node high-performance integration. Interconnects with various pitches and integration schemes were examined, and the effects of supporting dielectric layers including cap layer, chemical mechanical polishing stop layer, and etch stop layer were evaluated. The results indicated that the use of the supporting layers greatly affects the effective dielectric constant of interconnect structures. The impacts of the supporting dielectric layers on the effective dielectric constant were evaluated quantitatively, and the implications on back-end-of-line integration schemes were discussed. (C) 2003 American Institute of Physics.
引用
收藏
页码:2644 / 2646
页数:3
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