A Heuristic Algorithm for LUT-based FPGA Technology Mapping using the Lower Bound for DAG Covering Problem

被引：0

作者：

Takata, Taiga ^{[1
]}

Matsunaga, Yusuke ^{[1
]}

机构：

[1] Kyushu Univ, Fukuoka 812, Japan

来源：

FPGA 10 | 2010年

关键词：

FPGA; technology mapping;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

引用

页码：288 / 289

页数：2

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