Approximate Pattern Matching for On-Chip Interconnect Traffic Prediction

被引：0

作者：

Adhinarayanan, Vignesh ^{[1
]}

Feng, Wu-chun ^{[1
]}

机构：

[1] Virginia Tech, Blacksburg, VA 24061 USA

来源：

PACT '20: PROCEEDINGS OF THE ACM INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES | 2020年

关键词：

D O I：

10.1145/3410463.3414667

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Emerging multi-chip module GPUs (MCM-GPUs) expend over 17% of the total power budget on chip interconnects and this fraction is expected to increase as chip size increases. Towards proactively managing the power consumption of these interconnects, we propose approximate pattern matching to predict future interconnect traffic from past observations. Compared to past prediction techniques such as Markov model (MM) and history table (HT), our proposed technique reduces average prediction error to 2.66% from 7.11% and 3.83% for MM and HT, respectively.

引用

页码：357 / 358

页数：2

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