Co-implantation of Si and Be in Si GaAs for improved device performance

被引:0
|
作者
Dutt, MB [1 ]
Nath, R [1 ]
Kumar, R [1 ]
Sen, MN [1 ]
Kumar, V [1 ]
机构
[1] Solid State Phys Lab, Delhi 110054, India
关键词
D O I
10.1016/S0038-1101(98)00121-X
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The effect of co-implantation of Si and Be in GaAs is discussed in the light of tailoring of a MESFET implantation profile. The modified profile is calculated by considering electrical activation and diffusion of both Si and Be in GaAs. The results compare well with a realized n-layer measured by the C-V technique. Since the pinch-off voltage is a figure of merit of device performance, a calculation of the latter using a tailored implantation profile is also presented in this paper. (C) 1998 Elsevier Science Ltd. All rights reserved.
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页码:1905 / 1910
页数:6
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