FPGA based agile algorithm-on-demand co-processor

被引：2

作者：

Pradeep, R ^{[1
]}

Vinay, S ^{[1
]}

Burman, S ^{[1
]}

Kamakoti, V ^{[1
]}

机构：

[1] Indian Inst Technol, Dept Comp Sci, Madras 600036, Tamil Nadu, India

来源：

DESIGNERS' FORUM: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION | 2005年

关键词：

D O I：

10.1109/DATE.2005.160

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

With growing computational needs of many real-world applications, frequently changing specifications of standards, and the high design and NRE costs of ASICs, an algorithm-agile FPGA based co-processor has become a viable alternative. In this article, we report about the general design of an algorith-agile co-processor and the proof-of-concept implementation.

引用

页码：82 / 83

页数：2

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