Power and signal integrity co-design for quad flat non-lead package

被引:1
|
作者
Guan, S. -W. [1 ]
Kuo, C. -W. [1 ]
Wang, C. -C. [2 ]
Kitazawa, T. [3 ]
机构
[1] Natl Sun Yat Sen Univ, Dept Elect Engn, Kaohsiung 80424, Taiwan
[2] Adv Semicond Engn Inc, Elect Lab, Corp Design Div, Corp R&D, Kaohsiung, Taiwan
[3] Ritsumeikan Univ, Dept Elect & Elect Engn, Noji, Kusatsu 52577, Japan
关键词
D O I
10.1049/el.2012.0494
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The co-design of power and signal integrity issues on a quad flat non-lead (QFN) package is described. A novel decoupling capacitor is achieved by separating the die pad and footprint, coating a solder mask on the footprint and connecting the footprint to the printed circuit board power plane through a via. Large capacitance between power (footprint) and ground (die pad) resulted from the thin mask and large die pad lowering the input impedance of the power delivery network without parasitic effects at low frequency. A power bridge and a ground bridge are introduced to substitute the wire bond to decrease the inductance and hence the impedance magnitude up to 30%, thus enhancing the power integrity at high frequency. A modified design called hybrid power/ground exhibits great signal integrity by providing good reference for signals. The thermal dissipation is also better than the first design through direct contact of the die pad and the footprint ground regions. The overall design demonstrates excellent broadband performance for signal and power integrity.
引用
收藏
页码:942 / 943
页数:2
相关论文
共 50 条
  • [41] Signal-Power Interconnect Co-Design Based on Various Technology Options
    Shim, Da Eun
    Kini, Akshata Ashok
    Mallikarjuna, Meghana
    Kumar, Piyush
    Naeemi, Azad
    2023 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, IITC AND IEEE MATERIALS FOR ADVANCED METALLIZATION CONFERENCE, MAM, IITC/MAM, 2023,
  • [42] Signal and power integrity co-simulation for multi-layered system on package modules
    Bharath, Krishna
    Engin, Ege
    Swaminathan, Madhavan
    Uriu, Kazuhide
    Yamada, Toru
    2007 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY: WORKSHOP AND TUTORIAL NOTES, VOLS 1-3, 2007, : 65 - +
  • [43] Impact of Quad Flat No Lead package (QFN) on Automated X-ray Inspection (AXI)
    Liong, Tee Chwee
    Pascual, Andy
    2007 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2007, : 383 - 392
  • [44] Wire sweep issue in a newly developed quad flat no-lead (QFN) semiconductor package
    Abdullah, S.
    Aziz, Z. A.
    Ahmad, I.
    Jalar, A.
    Abdullah, M. F.
    NEW ASPECTS OF MICROELECTRONICS, NANOELECTRONICS, OPTOELECTRONICS, 2008, : 40 - 44
  • [45] Simulation and Analysis of Quad Flat No-lead Package (QFN) under Moisture, and Thermal Stress
    Wang, Chung-Kuei
    Wu, Mei-Ling
    PROCEEDINGS OF THE NINETEENTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM 2020), 2020, : 1165 - 1169
  • [46] The effect of leadframe oxidation of a quad flat no-lead semiconductor package under cyclic loading
    Department of Mechanical and Materials Engineering, Universiti Kebangsaan Malaysia, 43600 UKM Bangi Selangor, Malaysia
    Journal of Applied Sciences, 2008, 8 (09) : 1676 - 1683
  • [47] Compact physical models for power supply noise and chip/package co-design of Gigascale Integration
    Huang, Gang
    Sekar, Deepak C.
    Naeemi, Azad
    Shakeri, Kaveh
    Meindl, James D.
    57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS, 2007, : 1659 - +
  • [48] Futuire challenges of power bus modeling and decoupling capacitor for package-chip co-design
    Khaled, Pervez
    Chowdhury, Masud H.
    WMSCI 2006: 10TH WORLD MULTI-CONFERENCE ON SYSTEMICS, CYBERNETICS AND INFORMATICS, VOL III, PROCEEDINGS, 2006, : 162 - 166
  • [49] Chip-Package-PCB Co-Simulation for Power Integrity Design at the Early Design Stage
    Uematsu, Yutaka
    Taniguchi, Hitoshi
    Toyama, Masahiro
    Yagyu, Masayoshi
    Osaka, Hideki
    2015 IEEE 4TH ASIA-PACIFIC CONFERENCE ON ANTENNAS AND PROPAGATION (APCAP), 2015, : 451 - 452
  • [50] Chip-package co-design of a 4.7 GHz VCO
    Donnay, S
    Vaesen, K
    Pieters, P
    Diels, W
    Wambacq, P
    de Raedt, W
    Beyne, E
    Engels, M
    ICM'99: ELEVENTH INTERNATIONAL CONFERENCE ON MICROELECTRONICS - PROCEEDINGS, 1999, : 145 - 148