Power and signal integrity co-design for quad flat non-lead package

被引:1
|
作者
Guan, S. -W. [1 ]
Kuo, C. -W. [1 ]
Wang, C. -C. [2 ]
Kitazawa, T. [3 ]
机构
[1] Natl Sun Yat Sen Univ, Dept Elect Engn, Kaohsiung 80424, Taiwan
[2] Adv Semicond Engn Inc, Elect Lab, Corp Design Div, Corp R&D, Kaohsiung, Taiwan
[3] Ritsumeikan Univ, Dept Elect & Elect Engn, Noji, Kusatsu 52577, Japan
关键词
D O I
10.1049/el.2012.0494
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The co-design of power and signal integrity issues on a quad flat non-lead (QFN) package is described. A novel decoupling capacitor is achieved by separating the die pad and footprint, coating a solder mask on the footprint and connecting the footprint to the printed circuit board power plane through a via. Large capacitance between power (footprint) and ground (die pad) resulted from the thin mask and large die pad lowering the input impedance of the power delivery network without parasitic effects at low frequency. A power bridge and a ground bridge are introduced to substitute the wire bond to decrease the inductance and hence the impedance magnitude up to 30%, thus enhancing the power integrity at high frequency. A modified design called hybrid power/ground exhibits great signal integrity by providing good reference for signals. The thermal dissipation is also better than the first design through direct contact of the die pad and the footprint ground regions. The overall design demonstrates excellent broadband performance for signal and power integrity.
引用
收藏
页码:942 / 943
页数:2
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