Differential Evolution Based Design of Multiplier-less FIR Filter using Canonical Signed Digit Representation

被引:0
|
作者
Chandra, Abhijit [1 ]
Chattopadhyay, Sudipta [2 ]
机构
[1] Bengal Engn & Sci Univ, Dept Elect & Telecommun Engn, Sibpur 711103, Howrah, India
[2] Jadavpur Univ, Dept Elect & Telecommun Engn, Kolkata 700032, India
关键词
Canonical Signed Digit (CSD); Differential Evolution (DE); Field Programmable Gate Array (FPGA) chip; Finite Impulse Response (FIR) filter; multiplier-less filters;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Design of hardware efficient Finite duration Impulse Response (FIR) filter has drawn considerable attention amongst the researchers of late because of a number of striking features. Useful application of various intelligent optimization techniques has added special flavour to it. In this communication, we have incorporated a canonical signed digit (CSD) representation for the coefficients of multiplier-less low-pass FIR filter which have been optimized by means of a robust evolutionary computation mechanism, namely Differential Evolution (DE). As a matter of fact, each of the tap coefficients has been formulated as sums and/ or differences of powers of two. Design examples have proved the hardware efficiency of this CSD-based architecture as compared to conventional binary representation. Robustness of our approach has been substantiated by comparing its performance with a variety of state-of-the-art multiplier-less FIR filters from literature.
引用
收藏
页码:425 / 428
页数:4
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