Nonvolatile Magnetic Flip-Flop for Standby-power-free SoCs

被引：35

作者：

Sakimura, Noboru ^{[1
]}

Sugibayashi, Tadahiko ^{[1
]}

Nebashi, Ryusuke ^{[1
]}

Kasai, Naoki ^{[1
]}

机构：

[1] NEC Corp Ltd, Device Platforms Labs, Kanagawa 2291198, Japan

来源：

PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2008年

关键词：

D O I：

10.1109/CICC.2008.4672095

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A nonvolatile Magnetic Flip-Flop (MFF) primitive cell for SoC design libraries has been developed using a unique MRAM process. It has high design compatibility with conventional CMOS LSI designs. MFF maximum frequency was estimated to be 3.5 GHz, which is comparable to that of a normal CMOS DFF. An MFF test chip was fabricated with the process. The chip's functional performance was sufficiently high to demonstrate the potential of MFFs, which helps to reduce the power dissipation of SoCs dramatically.

引用

页码：355 / 358

页数：4

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