Research and Implementation of High Speed Parallel Carrier Synchronization Algorithm

The paper presents an efficient parallel carrier synchronization algorithm suitable for high speed demodulator system and easy to implement on FPGA platform. The parallel algorithm combines the phase frequency detector (PFD) algorithm of the fast capture and the phase detector (PD) algorithm of the stable tracking. First, it can quickly capture carrier frequency offset by using PFD algorithm. Then, we use the small phase jitter PD algorithm to stable tracking carrier phase offset. Thus, the carrier frequency offset and phase offset to be corrected quickly and accurately. We also investigate parallel carrier synchronization algorithm structure suitable for FPGA platform. The simulation and implementation results show that the proposed parallel carrier synchronization algorithm has excellent performance for MPSK modulated signal. Besides, the proposed parallel structure with low complexity can efficiently work.