Method to evaluate Cable Discharge Event (CDE) reliability of integrated circuits in CMOS technology

被引：0
|
作者：
Lai, Tai-Xiang [1 ]
Ker, Ming-Dou [1 ]
机构：
[1] Natl Chiao Tung Univ, Inst Elect, Nanoelect & Gigascale Syst Lab, Hsinchu, Taiwan
来源：
ISQED 2006: PROCEEDINGS OF THE 7TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN | 2006年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Cable Discharge Event (CDE) has been the main cause which damages the Ethernet interface in field applications. The transmission line pulsing (TLP) system has been the most popular method to observe electric characteristics of the device under human-body-model (HBM) electrostatic discharge (ESD) stress. In this work, the long-pulse transmission line pulsing (LP-TLP) system is proposed to simulate CDE reliability of the Ethernet integrated circuits, and the results are compared with the conventional 100-ns TLP system. The experimental results have shown that the CDE robustness of NMOS device in a 0.25-mu m CMOS technology is worse than its HBMESD robustness.
引用
收藏
页码：597 / +
页数：2
相关论文
共 50 条
  • [21] SCALING, OPTIMIZATION AND DESIGN CONSIDERATIONS OF ELECTROSTATIC DISCHARGE PROTECTION CIRCUITS IN CMOS TECHNOLOGY
    VOLDMAN, SH
    GROSS, VP
    JOURNAL OF ELECTROSTATICS, 1994, 33 (03) : 327 - 356
  • [22] The Suitability of the SPR-MP Method to Evaluate the Reliability of Logic Circuits
    Pontes, Matheus F.
    Butzen, Paulo F.
    Schvittz, Rafael B.
    Rosa Jr, Leomar S.
    Franco, Denis T.
    2018 25TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2018, : 433 - 436
  • [23] The single-event effect evaluation technology for nano integrated circuits
    郑宏超
    赵元富
    岳素格
    范隆
    杜守刚
    陈茂鑫
    于春青
    Journal of Semiconductors, 2015, (11) : 83 - 87
  • [24] The single-event effect evaluation technology for nano integrated circuits
    郑宏超
    赵元富
    岳素格
    范隆
    杜守刚
    陈茂鑫
    于春青
    Journal of Semiconductors, 2015, 36 (11) : 83 - 87
  • [25] The single-event effect evaluation technology for nano integrated circuits
    Zheng, Hongchao
    Zhao, Yuanfu
    Yue, Suge
    Fan, Long
    Du, Shougang
    Chen, Maoxin
    Yu, Chunqing
    JOURNAL OF SEMICONDUCTORS, 2015, 36 (11)
  • [26] The study of the sensitivity of CMOS integrated circuits to single event latchup using pulsed bremsstrahlung
    Zinchenko, V. F.
    Lavrentjev, K. V.
    Ozerov, A. I.
    Semenets, B. N.
    Chlenov, A. M.
    2016 16TH EUROPEAN CONFERENCE ON RADIATION AND ITS EFFECTS ON COMPONENTS AND SYSTEMS (RADECS), 2016,
  • [27] A FRAMEWORK TO EVALUATE TECHNOLOGY AND DEVICE DESIGN ENHANCEMENTS FOR MOS INTEGRATED-CIRCUITS
    SODINI, CG
    WONG, SS
    KO, PK
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (01) : 118 - 127
  • [28] Advanced Flexible CMOS Integrated Circuits on Plastic Enabled by Controlled Spalling Technology
    Shahrjerdi, D.
    Bedell, S. W.
    Khakifirooz, A.
    Fogel, K.
    Lauro, P.
    Cheng, K.
    Ott, J. A.
    Gaynes, M.
    Sadana, D. K.
    2012 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2012,
  • [29] Integrated silicon optoelectronic circuits (OEICs) in CMOS and BiCMOS technology for DVD systems
    Ghazi, A
    Heide, T
    Kieschnick, K
    Zimmermann, H
    Seegebrecht, P
    ELECTRO-OPTICS AND MICROELECTRONICS, PROCEEDINGS, 2000, 14 : 228 - 231
  • [30] A New Sensor for Temperature Self-Protection of Integrated Circuits in CMOS Technology
    Cartagena, Luis Q.
    Barbin, Silvio E.
    Salcedo, Walter J.
    2018 IEEE MTT-S LATIN AMERICA MICROWAVE CONFERENCE (LAMC 2018), 2018,
12345