A novel pseudo tri-gate vertical MOSFET with source/drain tie

被引:0
|
作者
Lin, Jyi-Tsong [1 ]
Tsai, Ying-Chieh [1 ]
Eng, Yi-Chuen [1 ]
Kang, Shiang-Shi [1 ]
Tseng, Yi-Ming [1 ]
Tseng, Hung-Jen [1 ]
Lin, Po-Hsieh [1 ]
机构
[1] Natl Sun Yat Sen Univ, Dept Elect Engn, Kaohsiung 80424, Taiwan
来源
IPFA 2008: PROCEEDINGS OF THE 15TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS | 2008年
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper investigates the device behaviours of a pseudo tri-gate ultra-thin-channel vertical MOSFET with source/drain tie. For comparison two transistors are designed. According to the 2D simulation, our proposed structure can effectively enhance the drain current and the thermal stability, mainly due to the ultrathin channel (Tsi = 10 nm). The fabricated device have very low subthreshold swing near 60 mV/dec with channel length 40 nm to 90 nm and excellent GM of 4 mS/mu m with channel length 35 nm owing to its unique features, when compared to its counterpart Also, the respective discontinuous buried oxide under the channel and the source/drain regions can construct a natural source/drain tie to overcome short-channel effects and self-heating effects as well.
引用
收藏
页码:185 / 188
页数:4
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