Characterization of P-Channel FOI-MAHAS Charge Trapping Memory with Improved Operation Characteristics

被引：0
|
作者：
Hou, Zhaozhao [1 ,2 ]
Yin, Huaxiang [1 ,2 ]
Wu, Zhenhua [1 ,2 ]
机构：
[1] Chinese Acad Sci, Inst Microelect, Key Lab Microelect Devices & Integrated Technol, Beijing 100029, Peoples R China
[2] Univ Chinese Acad Sci, Beijing 100049, Peoples R China
来源：
2018 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2018年
关键词：
p-channel; FOI-MAHAS; High-k; embedded flash; FINFET;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In order to enhance scalability, performance and operation efficiency for future embedded flash memory, p-channel fin-on-insulator (FOI) FinFET charge trapping memory devices with HfO2 charge trapping layer, Al2O3 tunneling layer and blocking layers as well as [TiN/W] metal gate (Metal/Al2O3/HfO2/Al2O3/Si, named as MAHAS) have been successfully fabricated. Afterwards, we systematically investigate the static electrical performance, program/erase speeds, date retention and endurance characteristics of the FOI-MAHAS memory with p-channel. A larger memory window, lower program/erase (PIE) voltages, enhanced P/E speed, along with good data retention and endurance characteristics are experimentally realized. Therefore, the proposed p-channel FOI-MAHAS charge trapping memory is promising for future embedded flash memory applications.
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页数：3
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