CMOS 8-Bit Current-Steering Digital Random Return to Zero DAC

被引：0
|
作者：
Mathurkar, Piyush K. [1 ]
Mali, Madan B. [1 ]
机构：
[1] Univ Pune, Sinhgad Coll Engn, Dept Elect & Telecommun Engn, Pune, Maharashtra, India
来源：
ADVANCES IN COMPUTING AND INFORMATION TECHNOLOGY, VOL 3 | 2013年 / 178卷
关键词：
Current steering; Digital-to-Analog Converter (DAC); Digital Random Return to Zero (DRRZ); 14-B;
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
Current steering Digital to Analog Converter (DAC) has advantage of high conversion rate and constant output impedance. A digital random return to zero technique to improve dynamic performance is presented in this paper. To demonstrate the proposed technique, 8 bit CMOS DAC is designed and layout is prepared in 90 nm technology. Computation of Integral Non Linearity (INL) and Differential Non Linearity (DNL) performance parameter is done. Chip consumes 57 mW power and 5483 (mu m)(2) area.
引用
收藏
页码：615 / 622
页数：8
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