Analytical Model of Gate to Channel Capacitance for Nanoscale MOSFETs

被引:4
|
作者
Chatterjee, Arun Kumar [1 ]
Prasad, B. [2 ]
机构
[1] Thapar Inst Engn & Technol, Elect & Commun Engn Dept, Patiala, Punjab, India
[2] Kurukshetra Univ, Dept Elect Sci, Kurukshetra, Haryana, India
关键词
Charge density; Potential well; Gate to channel capacitance; Wavefunction; Drain-induced barrier lowering; TUNNELING CURRENT; SILICON MOSFETS; INVERSION; DEGRADATION;
D O I
10.1080/03772063.2018.1510746
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We present an analytical model for gate to channel capacitance,CGC, in nanoscale metal oxide semiconductor field effect transistors. The model incorporates quantum mechanical effects, drain-induced barrier lowering and short channel effects. While the charge density in the channel is evaluated using two-dimensional density of states, the average separation charges from the interface are determined from the solution of Schrodinger's wave equation. We evaluate the average separation of charge carriers from the silicon-silicon dioxide interface, which facilitates the evaluation ofCGC. The calculated wavefunction gives a non-zero value at the Si-SiO(2)interface, which has a significant effect onCGCvis-a-vis the obtained value when the zero wavefunction is used. The evaluatedC(GC)is seen to be in reasonable agreement with the self-consistent results of Harelandet al. and van Dort's model.
引用
收藏
页码:608 / 616
页数:9
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