A Low Cost Robust Radiation Hardened Flip-Flop Circuit

被引:0
|
作者
Jain, A. [1 ]
Gupta, A. [1 ]
Garg, S. [1 ]
Veggetti, A. [2 ]
Castelnovo, A. [2 ]
Crippa, D. [2 ]
Gerardin, S. [3 ]
Bagatin, M. [3 ]
Cazzaniga, C. [4 ]
机构
[1] STMicroelectronics Pvt Ltd, Greater Noida, India
[2] STMicroelectronics Srl, Agrate Brianza, Italy
[3] Univ Padua, Padua, Italy
[4] Rutherford Appleton Lab, Didcot, Oxon, England
关键词
Soft error; single-event upset; single-event; Flip-flop; sequential logic circuits; SOFT ERRORS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new radiation hardened flip-flop, named low power single-phase clocked rad-hard flip flop, is proposed. The structure is based on robust differential-input latches working on a single-phase clock, which allows a reduction in the number of nodes sensitive to radiation. The proposed structure optimizes area and power and offers better performance, as compared to state-of-the-art techniques. Experimental results from test chip manufactured in a 180-nm BCD technology exposed to heavy ions, neutrons and alpha particles show that the proposed structure significantly reduces single event upsets (SEU).
引用
收藏
页码:494 / 499
页数:6
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