共 50 条
- [31] Low Voltage 7T SRAM cell in 32nm CMOS Technology Node 2018 INTERNATIONAL CONFERENCE ON COMPUTING, POWER AND COMMUNICATION TECHNOLOGIES (GUCON), 2018, : 231 - 234
- [32] Performance Analysis of Classical Two Stage Opamp Using CMOS and CNFET at 32nm Technology 2018 FOURTH INTERNATIONAL CONFERENCE ON COMPUTING COMMUNICATION CONTROL AND AUTOMATION (ICCUBEA), 2018,
- [33] Advanced High K/Metal SOI technologies for 32nm and beyond 2014 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014,
- [34] CMOS Transistor Scaling Past 32nm and Implications on Variation 2010 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE, 2010, : 241 - 246
- [35] 32nm General Purpose Bulk CMOS Technology for High Performance Applications at Low Voltage IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2008, TECHNICAL DIGEST, 2008, : 633 - 636
- [36] A Novel Hardened Design of a CMOS Memory Cell at 32nm IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE VLSI SYSTEMS, PROCEEDINGS, 2009, : 58 - 64
- [37] On Process Variation Tolerant Low Cost Thermal Sensor Design in 32nm CMOS Technology GLSVLSI 2009: PROCEEDINGS OF THE 2009 GREAT LAKES SYMPOSIUM ON VLSI, 2009, : 487 - 492
- [38] Scaling Deep Trench Based eDRAM on SOI to 32nm and Beyond 2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, 2009, : 236 - 239
- [40] A 18mW, 3.3dB NF, 60GHz LNA in 32nm SOI CMOS Technology with Autonomic NF Calibration PROCEEDINGS OF THE 2015 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM (RFIC 2015), 2015, : 319 - 322