Resonant Body Transistors in IBM's 32nm SOI CMOS Technology

被引：0
|
作者：
Marathe, R. [1 ]
Wang, W. [1 ]
Mahmood, Z. [1 ]
Daniel, L. [1 ]
Weinstein, D. [1 ]
机构：
[1] MIT, Cambridge, MA 02139 USA
来源：
IEEE INTERNATIONAL SOI CONFERENCE | 2012年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页数：2
相关论文
共 50 条
  • [1] Resonant Body Transistors in IBM's 32 nm SOI CMOS Technology
    Marathe, Radhika
    Bahr, Bichoy
    Wang, Wentao
    Mahmood, Zohaib
    Daniel, Luca
    Weinstein, Dana
    JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, 2014, 23 (03) : 636 - 650
  • [2] 40V MESFETs Fabricated on 32nm SOI CMOS
    Lepkowski, William
    Wilk, Seth J.
    Kam, J.
    Thornton, Trevor J.
    2013 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2013,
  • [3] Stress Engineering for 32nm CMOS Technology Node
    Wu, Jeff
    Wang, Xin
    2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 113 - 116
  • [4] Cryogenic Small-Signal and Noise Performance of 32nm SOI CMOS
    Coskun, A. H.
    Bardin, J. C.
    2014 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM (IMS), 2014,
  • [5] Designing SRAM using CMOS and CNTFET at 32nm Technology
    Shrivastava, Arushi
    Damahe, Parul
    Kumbhare, Vijay Rao
    Majumder, Manoj Kumar
    2019 IEEE INTERNATIONAL SYMPOSIUM ON SMART ELECTRONIC SYSTEMS (ISES 2019), 2019, : 284 - 287
  • [6] IBM制成32nm SOI嵌入式DRAM测试芯片
    国防制造技术, 2009, (05) : 72 - 72
  • [7] Resonant Body Transistors in Standard CMOS Technology
    Marathe, R.
    Wang, W.
    Mahmood, Z.
    Daniel, L.
    Weinstein, D.
    2012 IEEE INTERNATIONAL ULTRASONICS SYMPOSIUM (IUS), 2012, : 289 - 294
  • [8] A 25Gb/s ADC-Based Serial Line Receiver in 32nm CMOS SOI
    Rylov, Sergey
    Beukema, Troy
    Toprak-Deniz, Zeynep
    Toifl, Thomas
    Liu, Yong
    Agrawal, Ankur
    Buchmann, Peter
    Rylyakov, Alexander
    Beakes, Michael
    Parker, Benjamin
    Meghelli, Mounir
    2016 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC), 2016, 59 : 56 - U67
  • [9] High density DRAM for space utilizing embedded DRAMs macros in 32nm SOI CMOS
    Popp, Jeremy
    Ballast, John
    Rabaa, Salim
    McKay, Tony
    Braatz, Jim
    2011 IEEE INTERNATIONAL SOI CONFERENCE, 2011,
  • [10] A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS
    Plouchart, J. -O.
    Ferriss, M.
    Natarajan, A.
    Valdes-Garcia, A.
    Sadhu, B.
    Rylyakov, A.
    Parker, B.
    Beakes, M.
    Babakani, A.
    Yaldiz, S.
    Pileggi, L.
    Harjani, R.
    Reynolds, S.
    Tierno, J. A.
    Friedman, D.
    2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2012,
12345