Soft error derating computation in sequential circuits

被引:0
|
作者
Asadi, Hossein [1 ]
Tahoori, Mehdi B. [1 ]
机构
[1] Northeastern Univ, ECE Dept, Boston, MA 02115 USA
来源
IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, ICCAD | 2006年
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), the probability of system failure due to soft errors, is a key factor in design of cost-effective soft error resilient systems. We present a very fast and accurate approach based on enhanced static timing analysis and signal probabilities to estimate the probability of latching an incorrect value in the system bistables (timing derating). Experimental results and comparison with fault injections using timing accurate MonteCarlo simulations show that the accuracy of our approach is within 1% while orders of magnitude faster.
引用
收藏
页码:665 / +
页数:2
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