Automated Correction of Design Errors by Edge Redirection on High-Level Decision Diagrams

被引:0
|
作者
Karputkin, Anton [1 ]
Ubar, Raimund [1 ]
Tombak, Mati [1 ]
Raik, Jaan [1 ]
机构
[1] Tallinn Univ Technol, Tallinn, Estonia
关键词
high level decision diagrams; equivalence checking; automated error correction;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The paper presents a new method for design error correction by edge redirection on High-Level Decision Diagrams (HLDDs). In this paper, a canonical form of HLDDs developed by the authors is applied to automated correction of design errors. We show how realistic design errors can be represented by the redirection-based fault model. The theoretical basis of the approach is presented with the key advantages being the ability to handle multiple errors as well as the fact that the error correction is not restricted by the input stimuli. The method has been evaluated on a set of ITC99 benchmarks and on three real-world cores. Experiments show that the method is capable of correcting multiple design errors in very short run times
引用
收藏
页码:686 / 693
页数:8
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