Performance Evaluation of Reliability Aware Photonic Network-on-Chip Architectures

Network-on-Chip (NoC) is the preferred communication backbone for modern multicore chips. However, the multi-hop data transmission using wireline interconnects result in high energy dissipation and latency. Photonic interconnects have emerged as a promising alternative to the conventional metal/dielectric based on-chip wireline interconnects. Several novel architectures have been proposed using photonic waveguides as interconnects, which are capable of reducing the energy dissipation in data transfer significantly. However, the issues of reliability arising due to waveguide losses and adjacent channel crosstalk in photonic waveguides have not received much attention till date. In this paper we evaluate the performance of a photonic NoC architecture designed by segmenting the waveguides into smaller parts to limit the waveguide losses. This multi-segmented bus based photonic NoC (MSB-PNoC) architecture has been shown to provide higher levels of reliability than state-of-the-art photonic NoCs. Through detailed system level simulations in this work we demonstrate that the MSB-PNoC has a better performance and lower energy dissipation compared to the conventional mesh NoC while also providing better reliability in data transfer than other photonic NoCs.