A 0.87 mW 7MHz-BW 76dB-SNDR Passive Noise-Shaping Modulator Based On A SAR ADC

被引：0

作者：

Dai, Zhiyuan ^{[1
]}

Hu, Hang ^{[1
]}

Li, Manxin ^{[1
]}

Ye, Fan ^{[1
]}

Ren, Junyan ^{[1
]}

机构：

[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China

来源：

2017 IEEE 12TH INTERNATIONAL CONFERENCE ON ASIC (ASICON) | 2017年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The successive approximation register (SAR) ADC plays a key role in moderate resolution and conversion rate. In higher resolution occasion, pipeline ADC is a better choice but it needs higher power consumption. SAR ADC with a passive noise-shaping modulator is an appropriate choice to increase the ENOB and save power consumption. This paper proposes a design of a 3rd order passive noise-shaping modulator based on a SAR ADC in 65 nm CMOS technology, The simulation result realizes 76 dB SNDR at 80MS/s sampling frequency. It only consumes 0.87mW and achieves a FoMw of 11.9fJ/conv. step and FoMs of 175.22dB.

引用

页码：28 / 31

页数：4

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