SurgeNAS: A Comprehensive Surgery on Hardware-Aware Differentiable Neural Architecture Search

被引:8
|
作者
Luo, Xiangzhong [1 ]
Liu, Di [2 ]
Kong, Hao [1 ]
Huai, Shuo [1 ]
Chen, Hui [1 ]
Liu, Weichen [1 ]
机构
[1] Nanyang Technol Univ, Sch Comp Sci & Engn, Singapore 639798, Singapore
[2] Nanyang Technol Univ, HP NTU Digital Mfg Corp Lab, Singapore 639798, Singapore
关键词
Hardware; Task analysis; Optimization; Memory management; Estimation; Graph neural networks; Computers; Hardware-aware differentiable neural architecture search; graph neural networks; hardware performance prediction;
D O I
10.1109/TC.2022.3188175
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Differentiable neural architecture search (NAS) is an emerging paradigm to automate the design of top-performing convolutional neural networks (CNNs). Nonetheless, existing differentiable NAS methods suffer from several crucial weaknesses, such as inaccurate gradient estimation, high memory consumption, search fairness, etc. In this work, we introduce a novel hardware-aware differentiable NAS framework, namely SurgeNAS, in which we leverage the one-level optimization to avoid inaccuracy in gradient estimation. To this end, we propose an effective identity mapping regularization to alleviate the over-selecting issue. Besides, to mitigate the memory bottleneck, we propose an ordered differentiable sampling approach, which significantly reduces the search memory consumption to the single-path level, thereby allowing to directly search on target tasks instead of small proxy tasks. Meanwhile, it guarantees the strict search fairness. Moreover, we introduce a graph neural networks (GNNs) based predictor to approximate the on-device latency, which is further integrated into SurgeNAS to enable the latency-aware architecture search. Finally, we analyze the resource underutilization issue, in which we propose to scale up the searched SurgeNets within Comfort Zone to balance the computation and memory access, which brings considerable accuracy improvement without deteriorating the execution efficiency. Extensive experiments are conducted on ImageNet with diverse hardware platforms, which clearly show the effectiveness of SurgeNAS in terms of accuracy, latency, and search efficiency.
引用
收藏
页码:1081 / 1094
页数:14
相关论文
共 50 条
  • [1] FBNet: Hardware-Aware Efficient ConvNet Design via Differentiable Neural Architecture Search
    Wu, Bichen
    Dai, Xiaoliang
    Zhang, Peizhao
    Wang, Yanghan
    Sun, Fei
    Wu, Yiming
    Tian, Yuandong
    Vajda, Peter
    Jia, Yangqing
    Keutzer, Kurt
    2019 IEEE/CVF CONFERENCE ON COMPUTER VISION AND PATTERN RECOGNITION (CVPR 2019), 2019, : 10726 - 10734
  • [2] Fast Hardware-Aware Neural Architecture Search
    Zhang, Li Lyna
    Yang, Yuqing
    Jiang, Yuhang
    Zhu, Wenwu
    Liu, Yunxin
    2020 IEEE/CVF CONFERENCE ON COMPUTER VISION AND PATTERN RECOGNITION WORKSHOPS (CVPRW 2020), 2020, : 2959 - 2967
  • [3] Hardware-Aware Neural Architecture Search: Survey and Taxonomy
    Benmeziane, Hadjer
    El Maghraoui, Kaoutar
    Ouarnoughi, Hamza
    Niar, Smail
    Wistuba, Martin
    Wang, Naigang
    PROCEEDINGS OF THE THIRTIETH INTERNATIONAL JOINT CONFERENCE ON ARTIFICIAL INTELLIGENCE, IJCAI 2021, 2021, : 4322 - 4329
  • [4] Evolution of Hardware-Aware Neural Architecture Search on the Edge
    Richey, Blake
    Clay, Mitchell
    Grecos, Christos
    Shirvaikar, Mukul
    REAL-TIME IMAGE PROCESSING AND DEEP LEARNING 2023, 2023, 12528
  • [5] Hardware-Aware Bayesian Neural Architecture Search of Quantized CNNs
    Perrin, Mathieu
    Guicquero, William
    Paille, Bruno
    Sicard, Gilles
    IEEE EMBEDDED SYSTEMS LETTERS, 2025, 17 (01) : 42 - 45
  • [6] Hardware-Aware Zero-Shot Neural Architecture Search
    Yoshihama, Yutaka
    Yadani, Kenichi
    Isobe, Shota
    2023 18TH INTERNATIONAL CONFERENCE ON MACHINE VISION AND APPLICATIONS, MVA, 2023,
  • [7] Pareto Rank Surrogate Model for Hardware-aware Neural Architecture Search
    Benmeziane, Hadjer
    Niar, Smail
    Ouarnoughi, Hamza
    El Maghraoui, Kaoutar
    2022 IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE (ISPASS 2022), 2022, : 267 - 276
  • [8] One Proxy Device Is Enough for Hardware-Aware Neural Architecture Search
    Lu, Bingqian
    Yang, Jianyi
    Jiang, Weiwen
    Shi, Yiyu
    Ren, Shaolei
    PROCEEDINGS OF THE ACM ON MEASUREMENT AND ANALYSIS OF COMPUTING SYSTEMS, 2021, 5 (03)
  • [9] HGNAS: Hardware-Aware Graph Neural Architecture Search for Edge Devices
    Zhou, Ao
    Yang, Jianlei
    Qi, Yingjie
    Qiao, Tong
    Shi, Yumeng
    Duan, Cenlin
    Zhao, Weisheng
    Hu, Chunming
    IEEE Transactions on Computers, 2024, 73 (12) : 2693 - 2707
  • [10] Designing Efficient DNNs via Hardware-Aware Neural Architecture Search and Beyond
    Luo, Xiangzhong
    Liu, Di
    Huai, Shuo
    Kong, Hao
    Chen, Hui
    Liu, Weichen
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 41 (06) : 1799 - 1812