FPGA-Based High-Performance Network Impairment Emulator

被引:0
|
作者
Duan, Dexuan [1 ,2 ]
Wang, Xinshuo [1 ,2 ]
Li, Lin [1 ,2 ]
Liu, Lei [1 ,2 ]
机构
[1] Chinese Acad Sci, Inst Acoust, Natl Network New Media Engn Res Ctr, 21 North Fourth Ring Rd, Beijing 100190, Peoples R China
[2] Univ Chinese Acad Sci, Sch Elect Elect & Commun Engn, 19 A Yuquan Rd, Beijing 100049, Peoples R China
来源
ELECTRONICS | 2024年 / 13卷 / 24期
关键词
FPGA; impairment; network; WAN emulation;
D O I
10.3390/electronics13244998
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
With the rapid growth of Wide Area Networks (WANs) and advancements in 5G, cloud computing, and IoT, networks face higher demands for low cost, high capacity, reliability, and security. To ensure these requirements, network impairment emulators have become essential tools for testing and optimizing network performance under various conditions. This paper presents an FPGA-based Network Impairment Emulator (FNIE) that accurately emulates packet loss, reordering, and delay with high throughput and low cost. FNIE can achieve up to 100 Gbps throughput, with a configurable packet loss rate ranging from 0.001% to 100%, with a resolution as fine as 0.001%. It also supports up to 64 descriptor queues for reordering, a maximum reordering extent of 511, and emulates delays from 1 mu s to 1 s.
引用
收藏
页数:14
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