共 50 条
- [11] LAYOUT - PARTITIONING METHOD FOR MSI AND LSI. Proceedings - IEEE International Symposium on Circuits and Systems, 1977, : 160 - 163
- [12] Solve gate array placement using an improving genetic algorithm Xiaoxing Weixing Jisuanji Xitong/Mini-Micro Systems, 2002, 23 (03):
- [13] PHOTOMASK ARRAY PLACEMENT ON SLICES IN LSI PROCESSING MICROELECTRONICS AND RELIABILITY, 1973, 12 (06): : 539 - 545
- [14] CIRCUIT COMPARISON SYSTEM FOR BIPOLAR LINEAR LSI. NEC Research and Development, 1986, (80): : 86 - 96
- [15] MOSSIM: A SWITCH-LEVEL SIMULATOR FOR MOS LSI. Proceedings - Design Automation Conference, 1981, : 786 - 790
- [18] LAYOUT SYSTEM FOR THE RANDOM LOGIC PORTION OF MOS LSI. Jahrbuch der Schiffbautechnischen Gesellschaft, 1980, : 92 - 99
- [20] 0.25 mu m CMOS/SIMOX gate array LSI 1996 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 1996, 39 : 86 - 87