ARRAY LAYOUT METHODOLOGY FOR VLSI CIRCUITS.

被引：0

作者：

Krishnan, Musaravakkam S. ^{[1
]}

Hayes, John P. ^{[1
]}

机构：

[1] Xerox Corp, El Segundo, CA, USA, Xerox Corp, El Segundo, CA, USA

来源：

| 1600年 / C-35期

关键词：

ARRAY LAYOUT METHODOLOGY - CARRY-SAVE ADDERS - CUBE-CONNECTED CYCLES - LAYOUT SLICES;

D O I：

暂无

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学科分类号：

摘要：

引用

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[1] AN ARRAY LAYOUT METHODOLOGY FOR VLSI CIRCUITS
KRISHNAN, MS
HAYES, JP
IEEE TRANSACTIONS ON COMPUTERS, 1986, 35 (12) : 1055 - 1067
[2] SIMULATION OF DIGITAL VLSI CIRCUITS.
Dunn, A.
1983, (03):
[3] Design of Central Processor Units with Custom VLSI and Gate Array Circuits.
Fernandes, Claude
Acta electronica Paris, 1983, 25 (01): : 15 - 28
[4] Design and Layout of Microwave Circuits.
Gardiol, Fred
Annales des Telecommunications/Annals of Telecommunications, 1988, 43 (5-6): : 220 - 235
[5] TRENDS IN DRY ETCHING OF VLSI CIRCUITS.
Beinvogl, W.
Mohr, E.G.
Vide, les Couches Minces, 1985, (229):
[6] COMPILING PATH EXPRESSIONS INTO VLSI CIRCUITS.
Anantharaman, T.S.
Clarke, E.M.
Foster, M.J.
Mishra, B.
1987, : 305 - 355
[7] POWER DISTRIBUTION TECHNIQUES FOR VLSI CIRCUITS.
Song, William S.
Glasser, Lance A.
1600, (SC-21):
[8] IMPROVED SIGNATURE TEST FOR VLSI CIRCUITS.
Carter, J.L.
IBM technical disclosure bulletin, 1983, 26 (3 A): : 965 - 967
[9] AUTOMATIC LAYOUT OF VLSI CIRCUITS
BROWN, AD
COMPUTER-AIDED DESIGN, 1987, 19 (07) : 383 - 384
[10] A METHODOLOGY FOR CUSTOM VLSI LAYOUT
BREUER, MA
KUMAR, A
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1983, 30 (06): : 358 - 364